# π Hi, I'm Sarveswaran S M
π 3rd Year Mechatronics Engineering student at Jain University
Robotics | Automation | Embedded Systems
- Karnataka
- in/sarveswaran-s-m-30624a238
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UART-Verification-Project
UART-Verification-Project PublicVerilog UART TX/RX implementation with self-checking verification, loopback testing, random stimulus generation, waveform debugging and automated regression testing.
Verilog 1
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