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1. IIR-FIR_IP_SystemVerilog IIR-FIR_IP_SystemVerilog Public

   Open-source RTL IP developement for IIR/FIR filters in SystemVerilog, along with the C model and verification IP in UVM

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2. CPU_RTL_Design CPU_RTL_Design Public

   VHDL implementation of 16-bit cpu with memory subsystem and parameterizable datapath

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3. Multifunctional_Digital_Clock Multifunctional_Digital_Clock Public

   Design and implementation of a Multifunctional Digital Clock on STM32F4 and ZYNQ SoC using FreeRTOS and event-driven hierarchical state machines with documentation

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4. ThrowLin_Videogame ThrowLin_Videogame Public

   A desktop videogame written in C based on javelin throw sport

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5. iirjdart_modifiable_state iirjdart_modifiable_state Public

   Forked from Supercaly/iirjdart

   An IIR filter library written in Dart.

   Dart