Bump tilelang from 0.1.9 to 0.1.13

[dependabot]

Bumps tilelang from 0.1.9 to 0.1.13.

Release notes

Sourced from tilelang's releases.

v0.1.13

TileLang v0.1.13

This release contains 138 commits (79 bug fixes plus features, refactors, and examples) accumulated since v0.1.12 (2026-07-08 → 2026-08-02).

The headline work is a multi-backend language-dialect refactor that replaces the runtime-activated language facade with static per-backend re-exports, alongside two major new hardware paths: SM120 NVF4 block-scale MMA for Blackwell and Metal 4 (M5) cooperative-tensor GEMM. On top of that, a large batch of correctness fixes landed across reductions/scans, atomics, TMA/copy lowering, loop-step preservation, and FP encoding edge cases.

Breaking changes: this release removes several legacy APIs and packages. See Backend, API & Refactors before upgrading.

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Highlights

• [CUDA] SM120 (Blackwell) NVF4 block-scale MMA support (#2364) — T.mma_gemm_blockscaled now routes the packed-scale SM120 path internally through package-pingpong lowering, with an optimized non-persistent example (8192³ measured at ~1527 TFLOPS on SM120). The public micro_pipeline strategy knob was removed from the API.
• [Metal] M5 cooperative tensor T.gemm (#2252) — TileLang-owned cooperative-tensor intrinsics, Metal 4 MPP matmul2d shader emission, and a shape-aware instruction selector that keeps the simdgroup fallback for fragment accumulators and unsupported tiles.
• [CUDA] Arbitrary TMEM layouts (#2785) — TMEM buffers are no longer restricted to a fixed set of layouts.
• [Language/Backend] Language dialect for multi-backends (#2734) — the runtime-activated language facade was replaced with a static from tilelang.cuda.language import * re-export; CUDA/Metal/ROCm dialects now build on tilelang.language.common with per-backend TIR overlays (details below).
• [TIR] Source-span injection (#2751) — source locations are now carried into the TIRX IR and surfaced in compiler error messages.

New Features

• CUDA
  • SM70 GEMM FMA fallback (#2339) and SM75 extension of the GEMM FMA fallback (#2811) — T.gemm now works on older architectures instead of erroring out.
  • Pre-SM80 fallback for bf16 __hfma (#2769).
  • Stochastic FP32 → FP16/BF16 casts (#2735), with stochastic FP4/FP8 casts gated on sm_100a (#2691).
  • Arbitrary TMEM layout support (#2785).
  • Pipelining for multi-segment scans (#2664).
  • fp32x2 ops usable as reducers (#2637).
  • IKET profiler support for the CUDA backend (#2515).
• Metal
  • M5 cooperative-tensor GEMM (#2252).
  • Line-level threadgroup qualifier scanning for shared memory (pass 5) (#2796).
  • 16-byte alignment padding for shared/threadgroup memory (#2786).
• Compiler / IR / Runtime
  • Compiler pass timing profiling via the pass_profile pass-config option (with a configurable threshold) (#2622).
  • lower-trace support for debugging (new doc: docs/tools/lower_trace.md) (#2725).
  • Local buffer reduction lowering (#2693).
  • Typed vector lane extraction API (#2789) and typing wrappers for DSL ops (#2739).
  • Scalar tile scheduler state exposed (#2553).
  • Host-evaluable T.assume conditions are now enforced at runtime (#2655).
  • Deterministic CanProve (#2772).

Backend, API & Refactors

Language dialect refactor (#2734)

The runtime-activated language facade has been replaced by a static re-export architecture:

• Dropped the .pyi stubs + generator, py.typed, the globals()-based __all__ scraping, and _activate_cuda_facade().
• Backend dialects (cuda / metal / rocm) now build on tilelang.language.common with per-backend TIR overlays.
• Import-time dtype defaults in mma/wgmma/mfma macro generators are pinned to the dtypes leaf and no longer touch the half-initialized facade during bootstrap.

... (truncated)

Commits

• 8001cc4 [Release] Bump versin into 0.1.13 (#2826)
• 6b81bb8 [BugFix] Correctly preserve loop step when unrolling loops (#2835)
• 09526a2 Revert "[BugFix] Preserve loop step when unrolling loops" (#2834)
• 56a0f72 [BugFix] Reject unsupported TMA atomic add dtypes (#2830)
• bdb769a [Enhancement] Aggregate VerifyParallelLoop race diagnostics with span (#2806)
• e01c498 [JIT] Remove legacy DLPack execution backend (#2816)
• 2bb0def [BugFix] Fix two-instance modeling in ThreadSync cross-thread race checks (#2...
• 8f34abf [CUDA] Add SM120 NVF4 block-scale MMA support (#2364)
• 3e4a054 [Carver] Remove unused shape inference module (#2813)
• e18d969 [CUDA][Reduce] Simplify scalar AllReduce thread range analysis (#2814)
• Additional commits viewable in compare view

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