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Merged
yurydelendik merged 3 commits into from
Feb 19, 2021
Merged

Final SIMD opcodes #222

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97542e6
Final SIMD opcodes
yurydelendik Feb 8, 2021
072491e
Fix type; sync codes; add i64x2.abs
yurydelendik Feb 18, 2021
01fc29a
disable some tests
yurydelendik Feb 19, 2021
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89 changes: 50 additions & 39 deletions crates/wasmparser/src/binary_reader.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -1645,51 +1645,58 @@ impl<'a> BinaryReader<'a> {
0x50 => Operator::V128Or,
0x51 => Operator::V128Xor,
0x52 => Operator::V128Bitselect,
0x53 => Operator::F64x2ConvertLowI32x4S,
0x54 => Operator::F64x2ConvertLowI32x4U,
0x55 => Operator::I32x4TruncSatF64x2SZero,
0x56 => Operator::I32x4TruncSatF64x2UZero,
0x57 => Operator::F32x4DemoteF64x2Zero,
0x58 => Operator::V128Load8Lane {
0x53 => Operator::V128AnyTrue,
0x54 => Operator::V128Load8Lane {
memarg: self.read_memarg()?,
lane: self.read_lane_index(16)?,
},
0x59 => Operator::V128Load16Lane {
0x55 => Operator::V128Load16Lane {
memarg: self.read_memarg()?,
lane: self.read_lane_index(8)?,
},
0x5a => Operator::V128Load32Lane {
0x56 => Operator::V128Load32Lane {
memarg: self.read_memarg()?,
lane: self.read_lane_index(4)?,
},
0x5b => Operator::V128Load64Lane {
0x57 => Operator::V128Load64Lane {
memarg: self.read_memarg()?,
lane: self.read_lane_index(2)?,
},
0x5c => Operator::V128Store8Lane {
0x58 => Operator::V128Store8Lane {
memarg: self.read_memarg()?,
lane: self.read_lane_index(16)?,
},
0x5d => Operator::V128Store16Lane {
0x59 => Operator::V128Store16Lane {
memarg: self.read_memarg()?,
lane: self.read_lane_index(8)?,
},
0x5e => Operator::V128Store32Lane {
0x5a => Operator::V128Store32Lane {
memarg: self.read_memarg()?,
lane: self.read_lane_index(4)?,
},
0x5f => Operator::V128Store64Lane {
0x5b => Operator::V128Store64Lane {
memarg: self.read_memarg()?,
lane: self.read_lane_index(2)?,
},
0x5c => Operator::V128Load32Zero {
memarg: self.read_memarg_of_align(2)?,
},
0x5d => Operator::V128Load64Zero {
memarg: self.read_memarg_of_align(3)?,
},
0x5e => Operator::F32x4DemoteF64x2Zero,
0x5f => Operator::F64x2PromoteLowF32x4,
0x60 => Operator::I8x16Abs,
0x61 => Operator::I8x16Neg,
0x62 => Operator::V128AnyTrue,
0x62 => Operator::I8x16Popcnt,
0x63 => Operator::I8x16AllTrue,
0x64 => Operator::I8x16Bitmask,
0x65 => Operator::I8x16NarrowI16x8S,
0x66 => Operator::I8x16NarrowI16x8U,
0x69 => Operator::F64x2PromoteLowF32x4,
0x67 => Operator::F32x4Ceil,
0x68 => Operator::F32x4Floor,
0x69 => Operator::F32x4Trunc,
0x6a => Operator::F32x4Nearest,
0x6b => Operator::I8x16Shl,
0x6c => Operator::I8x16ShrS,
0x6d => Operator::I8x16ShrU,
Expand All @@ -1699,13 +1706,21 @@ impl<'a> BinaryReader<'a> {
0x71 => Operator::I8x16Sub,
0x72 => Operator::I8x16SubSatS,
0x73 => Operator::I8x16SubSatU,
0x74 => Operator::F64x2Ceil,
0x75 => Operator::F64x2Floor,
0x76 => Operator::I8x16MinS,
0x77 => Operator::I8x16MinU,
0x78 => Operator::I8x16MaxS,
0x79 => Operator::I8x16MaxU,
0x7a => Operator::F64x2Trunc,
0x7b => Operator::I8x16RoundingAverageU,
0x7c => Operator::I16x8ExtAddPairwiseI8x16S,
0x7d => Operator::I16x8ExtAddPairwiseI8x16U,
0x7e => Operator::I32x4ExtAddPairwiseI16x8S,
0x7f => Operator::I32x4ExtAddPairwiseI16x8U,
0x80 => Operator::I16x8Abs,
0x81 => Operator::I16x8Neg,
0x82 => Operator::I16x8Q15MulrSatS,
0x83 => Operator::I16x8AllTrue,
0x84 => Operator::I16x8Bitmask,
0x85 => Operator::I16x8NarrowI32x4S,
Expand All @@ -1723,14 +1738,14 @@ impl<'a> BinaryReader<'a> {
0x91 => Operator::I16x8Sub,
0x92 => Operator::I16x8SubSatS,
0x93 => Operator::I16x8SubSatU,
0x94 => Operator::F64x2Nearest,
0x95 => Operator::I16x8Mul,
0x96 => Operator::I16x8MinS,
0x97 => Operator::I16x8MinU,
0x98 => Operator::I16x8MaxS,
0x99 => Operator::I16x8MaxU,
0x9a => Operator::I16x8ExtMulLowI8x16S,
0x9b => Operator::I16x8RoundingAverageU,
0x9c => Operator::I16x8Q15MulrSatS,
0x9c => Operator::I16x8ExtMulLowI8x16S,
0x9d => Operator::I16x8ExtMulHighI8x16S,
0x9e => Operator::I16x8ExtMulLowI8x16U,
0x9f => Operator::I16x8ExtMulHighI8x16U,
Expand All @@ -1753,12 +1768,13 @@ impl<'a> BinaryReader<'a> {
0xb8 => Operator::I32x4MaxS,
0xb9 => Operator::I32x4MaxU,
0xba => Operator::I32x4DotI16x8S,
0xbb => Operator::I32x4ExtMulLowI16x8S,
0xbc => Operator::I32x4ExtMulLowI16x8S,
0xbd => Operator::I32x4ExtMulHighI16x8S,
0xbe => Operator::I32x4ExtMulLowI16x8U,
0xbf => Operator::I32x4ExtMulHighI16x8U,
0xc0 => Operator::I64x2Eq,
0xc0 => Operator::I64x2Abs,
0xc1 => Operator::I64x2Neg,
0xc3 => Operator::I64x2AllTrue,
0xc4 => Operator::I64x2Bitmask,
0xc7 => Operator::I64x2WidenLowI32x4S,
0xc8 => Operator::I64x2WidenHighI32x4S,
Expand All @@ -1768,22 +1784,18 @@ impl<'a> BinaryReader<'a> {
0xcc => Operator::I64x2ShrS,
0xcd => Operator::I64x2ShrU,
0xce => Operator::I64x2Add,
0xcf => Operator::I64x2AllTrue,
0xd0 => Operator::I64x2Ne,
0xd1 => Operator::I64x2Sub,
0xd2 => Operator::I64x2ExtMulLowI32x4S,
0xd3 => Operator::I64x2ExtMulHighI32x4S,
0xd5 => Operator::I64x2Mul,
0xd6 => Operator::I64x2ExtMulLowI32x4U,
0xd7 => Operator::I64x2ExtMulHighI32x4U,
0xd8 => Operator::F32x4Ceil,
0xd9 => Operator::F32x4Floor,
0xda => Operator::F32x4Trunc,
0xdb => Operator::F32x4Nearest,
0xdc => Operator::F64x2Ceil,
0xdd => Operator::F64x2Floor,
0xde => Operator::F64x2Trunc,
0xdf => Operator::F64x2Nearest,
0xd6 => Operator::I64x2Eq,
0xd7 => Operator::I64x2Ne,
0xd8 => Operator::I64x2LtS,
0xd9 => Operator::I64x2GtS,
0xda => Operator::I64x2LeS,
0xdb => Operator::I64x2GeS,
0xdc => Operator::I64x2ExtMulLowI32x4S,
0xdd => Operator::I64x2ExtMulHighI32x4S,
0xde => Operator::I64x2ExtMulLowI32x4U,
0xdf => Operator::I64x2ExtMulHighI32x4U,
0xe0 => Operator::F32x4Abs,
0xe1 => Operator::F32x4Neg,
0xe3 => Operator::F32x4Sqrt,
Expand All @@ -1810,12 +1822,11 @@ impl<'a> BinaryReader<'a> {
0xf9 => Operator::I32x4TruncSatF32x4U,
0xfa => Operator::F32x4ConvertI32x4S,
0xfb => Operator::F32x4ConvertI32x4U,
0xfc => Operator::V128Load32Zero {
memarg: self.read_memarg_of_align(2)?,
},
0xfd => Operator::V128Load64Zero {
memarg: self.read_memarg_of_align(3)?,
},
0xfc => Operator::I32x4TruncSatF64x2SZero,
0xfd => Operator::I32x4TruncSatF64x2UZero,
0xfe => Operator::F64x2ConvertLowI32x4S,
0xff => Operator::F64x2ConvertLowI32x4U,

_ => {
return Err(BinaryReaderError::new(
format!("Unknown 0xfd subopcode: 0x{:x}", code),
Expand Down
10 changes: 10 additions & 0 deletions crates/wasmparser/src/operators_validator.rs
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Expand Up @@ -1553,6 +1553,10 @@ impl OperatorValidator {
| Operator::I32x4GeU
| Operator::I64x2Eq
| Operator::I64x2Ne
| Operator::I64x2LtS
| Operator::I64x2GtS
| Operator::I64x2LeS
| Operator::I64x2GeS
| Operator::V128And
| Operator::V128AndNot
| Operator::V128Or
Expand Down Expand Up @@ -1607,6 +1611,10 @@ impl OperatorValidator {
| Operator::I64x2ExtMulHighI32x4S
| Operator::I64x2ExtMulLowI32x4U
| Operator::I64x2ExtMulHighI32x4U
| Operator::I16x8ExtAddPairwiseI8x16S
| Operator::I16x8ExtAddPairwiseI8x16U
| Operator::I32x4ExtAddPairwiseI16x8S
| Operator::I32x4ExtAddPairwiseI16x8U
| Operator::I16x8Q15MulrSatS => {
self.check_simd_enabled()?;
self.pop_operand(Some(Type::V128))?;
Expand Down Expand Up @@ -1643,10 +1651,12 @@ impl OperatorValidator {
Operator::V128Not
| Operator::I8x16Abs
| Operator::I8x16Neg
| Operator::I8x16Popcnt
| Operator::I16x8Abs
| Operator::I16x8Neg
| Operator::I32x4Abs
| Operator::I32x4Neg
| Operator::I64x2Abs
| Operator::I64x2Neg
| Operator::I32x4TruncSatF32x4S
| Operator::I32x4TruncSatF32x4U
Expand Down
10 changes: 10 additions & 0 deletions crates/wasmparser/src/primitives.rs
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Expand Up @@ -984,6 +984,10 @@ pub enum Operator<'a> {
I32x4GeU,
I64x2Eq,
I64x2Ne,
I64x2LtS,
I64x2GtS,
I64x2LeS,
I64x2GeS,
F32x4Eq,
F32x4Ne,
F32x4Lt,
Expand Down Expand Up @@ -1053,6 +1057,7 @@ pub enum Operator<'a> {
I32x4MaxS,
I32x4MaxU,
I32x4DotI16x8S,
I64x2Abs,
I64x2Neg,
I64x2AllTrue,
I64x2Bitmask,
Expand Down Expand Up @@ -1146,6 +1151,10 @@ pub enum Operator<'a> {
I64x2ExtMulHighI32x4S,
I64x2ExtMulLowI32x4U,
I64x2ExtMulHighI32x4U,
I16x8ExtAddPairwiseI8x16S,
I16x8ExtAddPairwiseI8x16U,
I32x4ExtAddPairwiseI16x8S,
I32x4ExtAddPairwiseI16x8U,
V128Load8x8S {
memarg: MemoryImmediate,
},
Expand Down Expand Up @@ -1205,4 +1214,5 @@ pub enum Operator<'a> {
F64x2ConvertLowI32x4U,
I32x4TruncSatF64x2SZero,
I32x4TruncSatF64x2UZero,
I8x16Popcnt,
}
12 changes: 12 additions & 0 deletions crates/wasmprinter/src/lib.rs
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Expand Up @@ -1230,6 +1230,10 @@ impl Printer {

I64x2Eq => self.result.push_str("i64x2.eq"),
I64x2Ne => self.result.push_str("i64x2.ne"),
I64x2LtS => self.result.push_str("i64x2.lt_s"),
I64x2GtS => self.result.push_str("i64x2.gt_s"),
I64x2LeS => self.result.push_str("i64x2.le_s"),
I64x2GeS => self.result.push_str("i64x2.ge_s"),

F32x4Eq => self.result.push_str("f32x4.eq"),
F32x4Ne => self.result.push_str("f32x4.ne"),
Expand Down Expand Up @@ -1293,6 +1297,7 @@ impl Printer {
I32x4Sub => self.result.push_str("i32x4.sub"),
I32x4Mul => self.result.push_str("i32x4.mul"),

I64x2Abs => self.result.push_str("i64x2.abs"),
I64x2Neg => self.result.push_str("i64x2.neg"),
I64x2AllTrue => self.result.push_str("i64x2.all_true"),
I64x2Bitmask => self.result.push_str("i64x2.bitmask"),
Expand Down Expand Up @@ -1452,6 +1457,13 @@ impl Printer {
F64x2ConvertLowI32x4U => self.result.push_str("f64x2.convert_low_i32x4_u"),
I32x4TruncSatF64x2SZero => self.result.push_str("i32x4.trunc_sat_f64x2_s_zero"),
I32x4TruncSatF64x2UZero => self.result.push_str("i32x4.trunc_sat_f64x2_u_zero"),

I8x16Popcnt => self.result.push_str("i8x16.popcnt"),

I16x8ExtAddPairwiseI8x16S => self.result.push_str("i16x8.extadd_pairwise_i8x16_s"),
I16x8ExtAddPairwiseI8x16U => self.result.push_str("i16x8.extadd_pairwise_i8x16_u"),
I32x4ExtAddPairwiseI16x8S => self.result.push_str("i32x4.extadd_pairwise_i16x8_s"),
I32x4ExtAddPairwiseI16x8U => self.result.push_str("i32x4.extadd_pairwise_i16x8_u"),
}
Ok(())
}
Expand Down
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