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[RyuJIT Wasm] CQ: Improve StoreSelectedScalar/LoadScalarAndInsert Codegen #131003

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@adamperlin

These are currently implemented using jump tables to select the right lane index when the lane isn't known at compile time, but the operation can be converted into {STORE,LOAD}(vector_base_addr, lane_offset), where the lane_offset does not necessarily need to be known at compile time. ReplaceScalar and ExtractScalar could also be implemented this way if the vectors were spilled to be addressable.

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arch-wasmWebAssembly architecturearea-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI

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