[LoongArch64] Part-3:Add changes in ObjectWriter component about nativeaot. - #104087
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Tagging subscribers to this area: @agocke, @MichalStrehovsky, @jkotas |
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| case TargetArchitecture.LoongArch64: | ||
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Are all registers in LA64 are simply mapped, including FP and SIMD?
The comment here can be reworded.
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The JIT mapping for FP regs starts at F0 == 32, the DWARF mapping starts at 64 AFAIK. Ideally this should be fixed by adding the code to correct the offset. Not sure about SIMD and if it's exposed at all.
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I think in LoongArch64, the DWARF mapping starts at 32, because UNW_LOONGARCH_F0 = 32 and UNW_LOONGARCH_F31 = 63. Not sure about SIMD, and it's not exposed yet.
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The JIT mapping for FP regs starts at
F0 == 32, the DWARF mapping starts at 64 AFAIK.
Yes, the LA64's DWARF-document supporting the SIMD, it starts from 64.
Ideally this should be fixed by adding the code to correct the offset. Not sure about SIMD and if it's exposed at all.
we had planned to update these within the Intrinsic pushing but the LoongArch64's Intrinsic patch is pending for waiting the LA64's SIMD manual.
I think it is close to the time publishing SIMD manual, and we will modify these together.
Thanks for your advices.
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You are right. I cross-checked the ABI docs. JIT maps the REG_F0 to 32, DWARF also maps it to 32 (la-abi-v2.30, section 6.1. DWARF Register Numbers).
However, the JIT uses DWARF register numbers that don't match the spec when generating unwinding information:
runtime/src/coreclr/jit/unwindloongarch64.cpp
Lines 123 to 218 in 117c4ab
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Yes, you are right.
These had been updated after LA merged into runtime, but the other places we didn't update, in fact you had told us and we planned to do this together with pushing the Intrinsic-LoongArch64 while the Intrinsic is pending temporarily.
We will do these in future.
Thanks for your advice!
This PR is the second part adding nativeaot support on LoongArch64.
It adds changes in ObjectWriter component.