V&V Plan: Adding contribution about Verification with model-based simulation (Sec 5.3)

[alexn84]

approach/methodology (URO & TWT): Usage of SysML and SystemC for modelling (especially URO will performing performance estimation of the future hardware)

[alexn84]

Please assign me to the issue above. Thank you very much.

[MarcBehrens]

Dear @alexn84,
somehow - due to technical issues on github - I cannot select you for this ticket. I selected Stefan Rieger instead.
@BerndHekele can you answer the question why not everyone on the project registered to github can be selected?
kr
Marc

[BerndHekele]

I assigned the topic to Alex. (I hope it is stil valid).
Alexander was not in any of the collaborator lists of validation. Therefore, you could not select him.

[alexn84]

Yes it is. Thank you.

@BerndHekele Did you put me onto the contributor list?

[BerndHekele]

You stil have only read access - I'm not aware of a committer right.