Build Customized FPGA Implementations for Vivado
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Updated
Sep 15, 2026 - Java
Build Customized FPGA Implementations for Vivado
Cost-aware post-placement FPGA timing optimizer — FPL'26 FPGA Design Optimization Contest submission (318.254, 7/7 clean, top 5)
LLM-guided agent for post-route FPGA timing optimization: a measured playbook over Vivado and RapidWright via MCP (FPL'26 Agentic FPGA Backend Optimization Contest, top-5)
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